ULEvalues describe: ULE 7973
Semiconductor equipment & lithography
Why it wins
TiO2-doped fused silica and glass ceramic with near-zero thermal expansion: EUV mask substrates and scanner metrology frames, because nanometer patterns cannot ride thermal expansion.
Why not the alternative
Standard silica CTE is too high by orders of magnitude.
Properties
The values below are candidate: compiled from the sources named, not yet individually validated.
Provisional provenance: Semiconductor chamber materials and plasma-resistant coating literature.
Wet cleaning
| Recipe | optical clean only: detergent, DI, solvent drag-wipe, no immersion of coated surfaces |
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| Forbidden | anything that could touch the figure or the coating |
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| Limit | surface figure in nanometres, so cleaning is an optical operation |
Vacuum and outgassing
| Outgassing, unbaked (10 h) | 1e-9 mbar·L/s/cm² |
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| Outgassing, baked | 1e-12 mbar·L/s/cm² |
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| Vapour pressure | none |
Temperature
| Bake, assembled | 200 °C |
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| Vacuum degas | 300 °C |
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| Metallurgical limit | Zerodur ceramises above 600 °C; ULE anneals ~1000 °C |
Thermal
| CTE | 0 ± 0.03 ppm/K |
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| Thermal conductivity | 1.3 W/m·K |
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| Specific heat | 770 J/kg·K |
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| Emissivity | 0.9 |
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| Melting / softening | 1490 soft. °C |
Mechanical
| Strength | 50 flex MPa |
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| Elongation | nil |
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| Young's modulus | 67–91 GPa |
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| Hardness | 600 HV |
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| Density | 2.21 ULE, 2.53 Zerodur g/cm3 |
Electrical and magnetic
| Relative permeability | 1.0 |
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| Resistivity | >1e15 Ω·cm |
Engineering
| Corrosion | inert |
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| Joining | optically contacted or low-stress bonded |
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| Process notes | the substrate for EUV mask blanks and mirrors |
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| Availability and cost | Corning and Schott, long lead, high cost |
Grades
| Corning ULE 7972 | EUV mask and mirror substrates |
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| Zerodur class 0 / 1 / 2 | expansion class per metrology budget |
Sources · 1
- EUV lithography overview, LTEM substrates
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