Ceramics and glasses · Workhorse

ULE and Zerodur (near-zero CTE)

ULEvalues describe: ULE 7973

Semiconductor equipment & lithography

Why it wins

TiO2-doped fused silica and glass ceramic with near-zero thermal expansion: EUV mask substrates and scanner metrology frames, because nanometer patterns cannot ride thermal expansion.

Why not the alternative

Standard silica CTE is too high by orders of magnitude.

Properties

The values below are candidate: compiled from the sources named, not yet individually validated. Provisional provenance: Semiconductor chamber materials and plasma-resistant coating literature.

Wet cleaning

Recipeoptical clean only: detergent, DI, solvent drag-wipe, no immersion of coated surfaces
Forbiddenanything that could touch the figure or the coating
Limitsurface figure in nanometres, so cleaning is an optical operation

Vacuum and outgassing

Outgassing, unbaked (10 h)1e-9 mbar·L/s/cm²
Outgassing, baked1e-12 mbar·L/s/cm²
Vapour pressurenone

Temperature

Bake, assembled200 °C
Vacuum degas300 °C
Metallurgical limitZerodur ceramises above 600 °C; ULE anneals ~1000 °C

Thermal

CTE0 ± 0.03 ppm/K
Thermal conductivity1.3 W/m·K
Specific heat770 J/kg·K
Emissivity0.9
Melting / softening1490 soft. °C

Mechanical

Strength50 flex MPa
Elongationnil
Young's modulus67–91 GPa
Hardness600 HV
Density2.21 ULE, 2.53 Zerodur g/cm3

Electrical and magnetic

Relative permeability1.0
Resistivity>1e15 Ω·cm

Engineering

Corrosioninert
Joiningoptically contacted or low-stress bonded
Process notesthe substrate for EUV mask blanks and mirrors
Availability and costCorning and Schott, long lead, high cost

Grades

Corning ULE 7972EUV mask and mirror substrates
Zerodur class 0 / 1 / 2expansion class per metrology budget
Sources · 1
  1. EUV lithography overview, LTEM substrates

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